Virtex

The hardware of modern CPLDs and FPGAs is very complex meanwhile.
We use in our firm FPGAs and CPLDs of the company Firma XILINX.
» Overview

The CPLDs of the model ranges XC9500, CoolRunner and CoolRunner-II have up to 512 macro cells, up to 12 000 system gates, up to 192 programmable inputs/ outputs, maximal frequecy of 303 MHz at a low power consumption less than 100 µA.

The XILINX FPGAs include the production series Spartan and Virtex with up to 10 Mio. gates, 1,25 MB Block RAM, over 1000 programmable inputs/ outputs, up to 512 (18x18 bit) hardware multiplier, up to 20 DCMs (Digital Clock Manager)with up to 500 MHz, up to four 10/100/100 Ethernet MACs, up to 24 RocketIO Transceiver with 622 Mb/s to 11,1 Gb/s and up to 4 hardware IBM PowerPCs 405 per integrated circuit.
» Schematic structure of a Spartan FPGA