XILINX Spartan-6

Balancing cost, space, power ans performance

The sixth generation in the Spartan FPGA Series enables system developers to meet demands for new features, while at the same time reducing system costs by up to half for lower-power, greener products.

  • Efficient six-input LUTs improve performance and minimize power
  • From 3,800 to 147,000 logic cells for system-level integration
  • Multiple efficient integrated blocks, Staggered I/O pads
  • Digital Clock Managers (DCMs) eliminate clock skew and duty cycle distortion
  • Frequency synthesis with simultaneous multiplication, division, and phase shifting
  • 18Kb blocks can be split into two independent 9Kb block RAMs
  • DDR, DDR2, DDR3, and LPDDR support, Data rates up to 800Mbps
  • Up to 1,050Mbps data transfer rate per differential I/O
  • Selectable output drive, up to 24mA per pin, 3.3V to 1.2V I/O standards and protocols
  • Each slice contains a fast 18 x 18 multiplier and a 48-bit accumulator capable of operating at 250MHz
  • GTP Transceivers in Spartan-6 LXT: 100Mbps to 3.2Gbps
  • PCI Express Block in Spartan-6 LXT FPGA
  • Low power consumption: < 150 mW (typical) at 3.2Gbps
  • Hard DRAM memory controller with 12.8Gbps memory bandwidth