最小Spartan-IIE开发包

硬件说明

• 开发包或者用于最终产品的相关硬件
• 多种装备可能
• 附加程序模块
• XILINX Spartan-3 with 400 k ...1.5 Mio system gates (456 Fine-Pitch BGA)
• latest AMD Flash Mirrorbit-technologie skalable from 8 MBit...512 MBit
• 3x10 Bit VGA out, 240 MSPS
• XILINX CoolRunner II CPLD with 64...256 macrocells
• skalable sSRAM with 0...36 MBit (also as SDRAM)
• many communication interfaces on board (RS232/485, 10/100 MBit Ethernet, 2xPS2)
• regulated 1,2 V; 1,8 V; 3,3 V; and 5 V generated from 7...20 V DC input voltage
• up to 170 FPGA I/O
• JTAG port
• 50 MHz clock
• temperature sensor

返回